Design of Snubber Circuits for Thyristor Protection
A snubber circuit consists of a series combination of resistance Rs and capacitance Cs in parallel with the thyristor as shown in Fig. 4.25. Strictly speaking, a capacitor Cs in parallel with the device is sufficient to prevent unwanted dv/dt triggering of the SCR. When switch S is closed, a sudden voltage appears across the circuit. Capacitor Cs behaves like a short circuit, therefore voltage across SCR is zero. With the passage of time, voltage across Cs builds up at a slow rate such that dv/dt across Cs and therefore across SCR is less than the specified maximum dv/dt rating of the device. Here the question arises that if Cs is enough to prevent accidental turn-on of the device by dv/dt, what is the need of putting Rs in series with Cs ? The answer to this is as under.
Before SCR is fired by gate pulse, Cs charges to full voltage Vs. When the SCR is turned on, capacitor discharges through the SCR and sends a current equal to Vs / (resistance of local path formed by Cs and SCR). As this resistance is quite low, the turn-on di/dt will tend to be excessive and as a result, SCR may be destroyed. In order to limit the magnitude of discharge current, a resistance Rs is inserted in series with Cs as shown in Fig. 4.25. Now when SCR is turned on, initial discharge current Vs/Rs is relatively small and turn-on di/dt is reduced.
In actual practice ; Rs, Cs and the load circuit parameters should be such that dv/dt across Cs during its charging is less than the specified dv/dt rating of the SCR and discharge current at the turn-on of SCR is within reasonable limits. Normally, Rs Cs and load circuit parameters form an underdamped circuit so that dv/dt is limited to acceptable values.
The design of snubber circuit parameters is quite complex.. In practice, designed snubber parameters are adjusted up or down in the final assembled power circuit so as to obtain a satisfactory performance of the power electronics system.